This invention relates generally to CMOS integrated circuits and more particularly to circuits for storing digital data.
A pair of cross-coupled inverters that hold a digital state are powered by supplies that also function as row select and column bit lines. A voltage differential between at least first pair of supply lines and a second pair of supply lines causes a current to flow into at least a third supply line depending upon the state of the cells. This current is sensed to read the logical OR or AND of the cells.